1. Field of the Invention
This invention generally relates to display fabrication and, more particularly, to a circuit-on-wire (CoW) technology generally useful in the fabrication of large array electronic panels.
2. Description of the Related Art
The fabrication of backplane arrays for various types of flat panel displays, such as liquid crystal display (LCD) or organic light emitting diode (OLED), requires multiple deposition and photolithographic patterning (selective etching) steps. These steps must take place using specialized process equipment capable of handling the substantial size of the substrates typically used for display manufacturing. In that sense, the manufacturing cost is a function of the substrate area and, hence, tends to increase geometrically with the display size [i.e. manufacturing cost˜(display diagonal)2]. In order to achieve a lower product cost, manufacturing costs must be minimized. This fact is especially evident in the case of large displays, which have become increasingly ubiquitous in everyday life—from home TVs, to information and advertising digital signs.
Another important issue in display backplane fabrication is optical transparency. High optical transparency is desirable for improving display appearance (i.e. brightness) and, ultimately, for enabling a visually transparent panel that can seamlessly integrate with its surroundings and function harmoniously within its operating environment.
FIG. 1 is a plan view of a thin-film transistor (TFT) active matrix array backplane (prior art). The backplane consists of a plurality of pixel elements formed by the intersecting horizontal (gate) and vertical (data) metal lines. These pixel elements host a number of sub-components (mostly thin film transistors and capacitor elements), which function to determine the “state” of the pixel—in other words, how much light is allowed through the pixel area to reach an observer. For a highly transparent display, which one can “see through” when not displaying an image, it is desirable that the majority of the pixel area be void of any components that may obstruct the passage (transmission) of visible light. For example, referring to FIG. 1B, it is desirable to maximize the “active” area and minimize the “dead zone” area. Note: although a display backplane is depicted, the same issues apply to an active matrix array that receives and processes light, such as a charge-coupled device (CCD) camera.
FIG. 2 is a plan view of a typical LCD pixel structure (prior art). In terms of fabrication, pixels—consisting of the intersecting metal lines and the internal subcomponents—are constructed by a succession of thin-film material formation (e.g. deposition) steps and feature-patterning steps by subtractive processing (e.g. combination of photolithography and etching steps).
The pixel size is determined by the desired resolution of the panel, expressed in pixels-per-inch (PPI). For example, a 50 PPI panel consists of 508×508 micron (μm) pixels, while a 150 PPI panel consists of 169×169 μm pixels. For a full-color display, the pixel is further divided into sub-pixels—in the simplest case one sub-pixel for each of (R)ed, (G)reen and (B)lue). As a result, the ultimate sub-pixel size is given (in μm) by the formula: 25400/(3·PPI), where PPI refers to the target panel resolution. In the ideal case, all the pixel area contributes to light transmission, but practically, only a portion of the pixel area actually transmits light. As shown in FIG. 2 for example, light transmission is blocked by the capacitor(s), TFT(s), and width of metal wires (horizontal & vertical). The area of these components tends to scale with the overall pixel area. For very small pixels, the effective pixel area (expressed often by the term aperture ratio) tends to become prohibitively small. For a high quality transparent display, aperture ratios (the ratio of transmissive area to total pixel area) of more than 85% are typically demanded.
It would be advantageous if a means existed for fabricating an active matrix array with a larger aperture ratio. It would also be advantageous if this fabrication means permitted the active matrix arrays to be produced at a lower cost.